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fn8179 rev.2.00 page 1 of 16 december 21, 2009 fn8179 rev.2.00 december 21, 2009 x9315 low noise, low power, 32 taps digitally controlled potentiomete r (xdcp?) datasheet the intersil x9315 is a digit ally controlled potentiometer (xdcp). the device consists of a resistor array, wiper switches, a control section, and nonvolatile memory. the wiper position is controll ed by a 3-wire interface. the potentiometer is impleme nted by a resistor array composed of 31 resistive ele ments and a wiper switching network. between each element and at either end are tap points accessible to the wiper terminal. the position of the wiper element is co ntrolled by the cs , u/d , and inc inputs. the position of the wiper can be stored in nonvolatile memory and then be recalled upon a subsequent power-up operation. the device can be used as a three-terminal potentiometer or as a two-terminal va riable resistor in a wide variety of applications including: ? control ? parameter adjustments ? signal processing features ? solid-state potentiometer ? 3-wire serial interface ? 32 wiper tap points - wiper position stored i n nonvolatile memory and recalled on power-up ? 31 resistive elements - temperature compensated - end to end resistance range 20% - terminal voltage, 0 to v cc ? low power cmos -v cc = 2.7v or 5v - active current, 80/400a max. - standby current, 5a max. ? high reliability - endurance, 100,000 data changes per bit - register data retention, 100 years ?r total values = 10k ? , 50k ? , 100k ? ? packages - 8 ld soic, msop and pdip ? pb-free available (rohs compliant) block diagram 5-bit up/down counter 5-bit nonvolatile memory store and recall control circuitry one of decoder resistor array r h /v h u/d inc cs transfer gates thirty v cc v ss r l /v l r w /v w control and memory up/down (u/d ) increment (inc ) device select (cs ) v cc (supply voltage) v ss (ground) r h /v h r w /v w r l /v l general detailed 0 1 2 28 29 30 31 two
x9315 fn8179 rev.2.00 page 2 of 16 december 21, 2009 ordering information part number part marking v cc limits (v) r total (k ? ) temp range (c) package pkg. dwg. # x9315wmz (note 2) ddt 5 10% 10 0 to 70 8 ld msop (pb-free) m8.118 x9315wmzt1 (notes 1, 2) ddt 0 to 70 8 ld msop (pb-free) m8.118 x9315wmit2 (note 1) aax -40 to 85 8 ld msop m8.118 x9315wmiz (note 2) akw -40 to 85 8 ld msop (pb-free) m8.118 x9315wmizt1 (notes 1, 2) akw -40 to 85 8 ld msop (pb-free) m8.118 x9315wp x9315wp 0 to 70 8 ld pdip mdp0031 x9315wst1 (note 1) x9315w 0 to 70 8 ld soic m8.15e x9315wsz (note 2) x9315w z 0 to 70 8 ld soic (pb-free) m8.15 x9315wszt1 (notes 1, 2) x9315w z 0 to 70 8 ld soic (pb-free) m8.15 x9315wsi x9315w i -40 to 85 8 ld soic m8.15e X9315WSIT1 (note 1) x9315w i -40 to 85 8 ld soic m8.15e x9315wsiz (note 2) x9315w zi -40 to 85 8 ld soic (pb-free) m8.15 x9315wsizt1 (notes 1, 2) x9315w zi -40 to 85 8 ld soic (pb-free) m8 .15 x9315umz (note 2) dds 50 0 to 70 8 ld msop (pb-free) m8.118 x9315umzt1 (notes 1, 2) dds 0 to 70 8 ld msop (pb-free) m8.118 x9315umi aeb -40 to 85 8 ld msop m8.118 x9315umit1 (notes 1, 2) aeb -40 to 85 8 ld msop m8.118 x9315umiz (note 2) ddr -40 to 85 8 ld msop (pb-free) m8.118 x9315umizt1 (notes 1, 2) ddr -40 to 85 8 ld msop (pb-free) m8.118 x9315ust2 (note 1) x9315u 0 to 70 8 ld soic m8.15e x9315usz (note 2) x9315u z 0 to 70 8 ld soic (pb-free) m8.15 x9315uszt1 (notes 1, 2) x9315u z 0 to 70 8 ld soic (pb-free) m8.15 x9315usiz (note 2) x9315u zi -40 to 85 8 ld soic (pb-free) m8.15 x9315usizt1 (notes 1, 2) x9315u zi -40 to 85 8 ld soic (pb-free) m8 .15 x9315tmz (note 2) ddn 100 0 to 70 8 ld msop (pb-free) m8.118 x9315tmzt1 (notes 1, 2) ddn 0 to 70 8 ld msop (pb-free) m8.118 x9315tmiz (note 2) ddl -40 to 85 8 ld msop (pb-free) m8.118 x9315tmizt1 (notes 1, 2) ddl -40 to 85 8 ld msop (pb-free) m8.118 x9315tsz (note 2) x9315t z 0 to 70 8 ld soic (pb-free) m8.15 x9315tszt1 (notes 1, 2) x9315t z 0 to 70 8 ld soic (pb-free) m8.15 x9315tsiz (note 2) x9315t zi -40 to 85 8 ld soic (pb-free) m8.15 x9315tsizt1 (notes 1, 2) x9315t zi -40 to 85 8 ld soic (pb-free) m8 .15 x9315wmz-2.7 (note 2) aoi 2.7 to 5.5 10 0 to 70 8 ld msop (pb-free) m 8.118 x9315wmz-2.7t1 (notes 1, 2) aoi 0 to 70 8 ld msop (pb-free) m8.118 x9315wmi-2.7t2 (note 1) aav -40 to 85 8 ld msop m8.118 x9315wmiz-2.7 (note 2) akx -40 to 85 8 ld msop (pb-free) m8.118 x9315wmiz-2.7t1 (notes 1, 2) akx -40 to 85 8 ld msop (pb-free) m8.1 18 x9315ws-2.7 x9315w f 0 to 70 8 ld soic m8.15e
x9315 fn8179 rev.2.00 page 3 of 16 december 21, 2009 x9315ws-2.7t1 (note 1) x9315w f 2.7 to 5.5 10 0 to 70 8 ld soic m8.15 e x9315wsz-2.7 (note 2) x9315w zf 0 to 70 8 ld soic (pb-free) m8.15 x9315wsz-2.7t1 (notes 1, 2) x9315w zf 0 to 70 8 ld soic (pb-free) m 8.15 x9315wsi-2.7t1 (note 1) x9315w g -40 to 85 8 ld soic m8.15e x9315wsiz-2.7 (note 2) x9315w zg -40 to 85 8 ld soic (pb-free) m8.1 5 x9315wsiz-2.7t1 (notes 1, 2) x9315w zg -40 to 85 8 ld soic (pb-fre e) m8.15 x9315umz-2.7 (note 2) aku 50 0 to 70 8 ld msop (pb-free) m8.118 x9315umz-2.7t1 (notes 1, 2) aku 0 to 70 8 ld msop (pb-free) m8.118 x9315umiz-2.7 (note 2) ajg -40 to 85 8 ld msop (pb-free) m8.118 x9315umiz-2.7t1 (notes 1, 2) ajg -40 to 85 8 ld msop (pb-free) m8.1 18 x9315us-2.7t2 (note 1) x9315u f 0 to 70 8 ld soic m8.15e x9315usz-2.7 (note 2) x9315u zf 0 to 70 8 ld soic (pb-free) m8.15 x9315usz-2.7t1 (notes 1, 2) x9315u zf 0 to 70 8 ld soic (pb-free) m 8.15 x9315usi-2.7 x9315u g -40 to 85 8 ld soic m8.15e x9315usiz-2.7 (note 2) x9315u zg -40 to 85 8 ld soic (pb-free) m8.1 5 x9315usiz-2.7t1 (notes 1, 2) x9315u zg -40 to 85 8 ld soic (pb-fre e) m8.15 x9315tmz-2.7 (note 2) ddp 100 0 to 70 8 ld msop (pb-free) m8.118 x9315tmz-2.7t1 (notes 1, 2) ddp 0 to 70 8 ld msop (pb-free) m8.118 x9315tmi-2.7t1 (note 1) ady -40 to 85 8 ld msop m8.118 x9315tmiz-2.7 (note 2) ddm -40 to 85 8 ld msop (pb-free) m8.118 x9315tmiz-2.7t1 (notes 1, 2) ddm -40 to 85 8 ld msop (pb-free) m8.1 18 x9315tsz-2.7 (note 2) x9315t zf 0 to 70 8 ld soic (pb-free) m8.15 x9315tsz-2.7t1 (notes 1, 2) x9315t zf 0 to 70 8 ld soic (pb-free) m 8.15 x9315tsiz-2.7 (note 2) x9315t zg -40 to 85 8 ld soic (pb-free) m8.1 5 x9315tsiz-2.7t1 (notes 1, 2) x9315t zg -40 to 85 8 ld soic (pb-fre e) m8.15 notes: 1. please refer to tb347 for de tails on reel specifications. 2. these intersil pb-free plasti c packaged products employ speci al pb-free material sets, molding compounds/die attach material s, and 100% matte tin plate plus anneal (e3 terminat ion finish, which is rohs com pliant and compatible with both snpb and pb-free soldering oper ations). intersil pb-free products are msl classified at pb-free peak reflow temp eratures that meet or exceed the pb-free requirements of ipc/je dec j std- 020. ordering information (continued) part number part marking v cc limits (v) r total (k ? ) temp range (c) package pkg. dwg. #
x9315 fn8179 rev.2.00 page 4 of 16 december 21, 2009 pin configuration x9315 (8 ld msop, soic, pdip) top view pin description r h /v h and r l /v l the high (r h /v h ) and low (r l /v l ) terminals of the x9315 are equivalent to the fixed t erminals of a mechanical potentiometer. the minimum voltage is v ss and the maximum is v cc . the terminology of r l /v l and r h /v h references the relative position of the termina l in relation to wiper movement direction selected by the u/d input, and not the voltage potential on the terminal. r w /v w r w /v w is the wiper termi nal and is equival ent to the movable terminal of a mechanical potenti ometer. the position of the wiper within the array is dete rmined by the control inputs. the wiper terminal series resistance is typically 200 ? at v cc = 5v. up/down (u/d ) the u/d input controls the direct ion of the wiper movement and whether the counter is in cremented or decremented. increment (inc ) the inc input is negative-edge triggered. toggling inc will move the wiper and either increment or decrement the counter in the direction indicated by the logic leve l on the u/d input. chip select (cs ) the device is sele cted when the cs input is low. the current counter value is stored in nonvolatile memory when cs is returned high while the inc input is also high. after the store operation is complete the x93 15 will be placed in the low power standby mode until the d evice is selected once again. principles of operation there are three sections of the x9315: the input control, counter and decode section; t he nonvolatile m emory; and the resistor array. the input contro l section operates just like an up/down counter. the output of th is counter is decoded to turn on a single electronic switch co nnecting a point on the resisto r array to the wiper output. unde r the proper conditions the contents of the counter can be stored in nonvolatile memory and retained for future use. t he resistor array is comprised of 31 individual resistors connected in series. at either end of t he array and between each resistor is an electroni c switch that transfers the connection at that point to the wiper. the wiper, when at either fixe d terminal, act s like its mechanical equivalent and does not move bey ond the last position. that is, the counte r does not wrap around when clocked to either extreme. the electronic switches on t he device operate in a make before break mode when the w iper changes tap positions. if the wiper is moved several pos itions, multiple taps are connected to the wiper for t iw (inc to v w change). the r total value for the devi ce can temporarily be reduced by a significant amount if the wiper is moved several positions. when the device is powered-dow n, the last wiper position stored will be maintained in t he nonvolatile memory. when power is restored, the contents of the memory are recalled and the wiper is set to t he value last stored. instructions and programming the inc , u/d and cs inputs control the movement of the wiper along the resistor array. with cs set low the device is selected and enabled to respond to the u/d and inc inputs. high to low transitions on inc will increment or decrement (depending on the state of the u/d input) a five bit counter. the output of this counter is decode d to select one of thirty two wiper positions along the resistive array. the value of the counter is s tored in nonvolatile memory whenever cs transitions high while the inc input is also high. the system may sele ct the x9315, move the wiper and deselect the device without having to store the latest wiper position in nonvolatile memory . after the wiper movement is performed as described above and once the new position is reached, the system must keep inc low while taking cs high. the new wiper position will be maintained until changed by the system or until a pow er-up/down cycle recalled the previously stored data. this procedure allows the syst em to always po wer-up to a preset value stored in nonvola tile memory; then during system operation minor adjustments co uld be made. the adjustments pin names symbol description r h /v h high terminal r w /v w wiper terminal r l /v l low terminal v ss ground v cc supply voltage u/d up/down control input inc increment control input cs chip select control input v cc cs inc u/d r h /v h v ss 1 2 3 4 8 7 6 5 x9315 r l /v l r w /v w
x9315 fn8179 rev.2.00 page 5 of 16 december 21, 2009 might be based on user prefe rence, system parameter changes due to temper ature drift, etc... the state of u/d may be changed while cs remains low. this allows the host system to enable the device and then move the wiper up and down until the proper trim is attained. power-up and down requirements there are no restrictions on the power-up or power-down conditions of v cc and the voltages applied to the potentiometer pins provided that v cc is always more positive than or equal to v h , v l , and v w , i.e., v cc ?? v h , v l , v w . the v cc ramp rate spec is always in effect. mode selection cs inc u/d mode l h wiper up l l wiper down h x store wiper position to nonvolatile memory h x x standby l x no store, return to standby l h wiper up (not recommended) l l wiper down (not recommended)
x9315 fn8179 rev.2.00 page 6 of 16 december 21, 2009 absolute maximum ratings thermal information temperature under bias . . . . . . . . . . . . . . . . . . . . . .-65 ? c to +135 ? c storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65c to +150c voltage on cs , inc , u/d , v h , v l and v cc with respect to v ss . . . . . . . . . . . . . . . . . . . . . . . -1v to +7v ? v = |v h Cv l | . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5v i w (10 seconds) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7.5ma thermal resistance (typical, notes 3, 4) ? ja (c/w) ? jc (c/w) 8 ld soic . . . . . . . . . . . . . . . . . . . . . . 105 68 8 ld msop. . . . . . . . . . . . . . . . . . . . . . 154 58 8 ld pdip. . . . . . . . . . . . . . . . . . . . . . . 85 57 pb-free reflow profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/pb-freereflow.asp recommended operating conditions temperature (commercial) . . . . . . . . . . . . . . . . . . . . . 0c to +70c temperature (industrial). . . . . . . . . . . . . . . . . . . . . . .-40c to +85c supply voltage (v cc ) (note 8) limits x9315. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5v 10% x9315-2.7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7v to 5.5v max wiper current, i w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.75m a max power rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10mw caution: do not operate at or near the maximum ratings listed fo r extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. notes: 3. ? ja is measured with the component mounted on a high effective the rmal conductivity test board in free air. see tech brief tb379 for details. 4. for ? jc , the case temp location is taken at the package top center. potentiometer characteristics (over recommended operating conditions unless otherwise stated. ) symbol parameter test conditions/notes limits min (note 9) typ (note 8) max (note 9) unit end to end resistance tolerance -20 +20 % v vh v h terminal voltage 0 v cc v v vl v l terminal voltage 0 v cc v r w wiper resistance i w = [v(r h ) - v(r l )]/ r total , v cc = 5v 200 400 ? r w wiper resistance i w = [v(r h ) - v(r l )]/ r total , v cc = 2.7v 400 1000 ? noise ref: 1khz -120 dbv resolution 3% absolute linearity (note 5) v w(n)(actual) - v w(n)(expected) 1 mi (note 7) relative linearity (note 6) v w(n + 1) - [v w(n) + mi ]0.2mi (note 7) r total temperature coefficient 300 ppm/c ratiometric temperature coefficient 20 ppm/c c h /c l /c w potentiometer capacitances see circuit #3 on page 7 10/10/25 pf notes: 5. absolute linearity is utilized to determine actual wiper volt age versus expected voltage = (v w(n) (actual) - v w(n) (expected)) = 1 ml maximum. 6. relative linearity is a measur e of the error in step size bet ween taps = r w(n+1) - [r w(n) + ml] = 0.2 ml. 7. 1 ml = minimum increment = r tot /31. 8. typical values are for t a = +25c and nominal supply voltage. 9. parameters with min and/or max limits are 100% tested at +25 c, unless otherwise specified. temperature limits established b y characterization and are not production tested.
x9315 fn8179 rev.2.00 page 7 of 16 december 21, 2009 dc electrical specifications (over recommended operating conditi ons unless otherwise specifi ed. symbol parameter test conditions limits unit min (note 9) typ (note 8) max (note 9) v cc supply voltage x9315 4.5 5.5 v x9315-2.7 2.7 5.5 v i cc1 v cc active current (increment) cs = v il , u/d = v il or v ih and inc = 0.4v @ max. t cyc 80 a i cc2 v cc active current (store) (eeprom store) cs = v ih , u/d = v il or v ih and inc = v ih @ max. t wr 400 a i sb standby supply current cs = v cc - 0.3v, u/d and inc = v ss or v cc - 0.3v 5a i li cs , inc , u/d input leakage current v in = v ss to v cc -10 +10 a v ih cs , inc , u/d input high voltage v cc x 0.7 v cc + 0.5 v v il cs , inc , u/d input low voltage -0.5 v cc x 0.1 v c in cs , inc , u/d input capacitance v cc = 5v, v in = v ss , t a = +25c, f = 1mhz 10 pf endurance and data retention parameter min unit minimum endurance 100,000 data changes per bit data retention 100 years test circuit #1 test circuit #2 circuit #3 spice macro model test point v w /r w v h /r h v l /r l v s force current v l vw test point v h /r h v w /r w v l /r l c h c l r w 10pf 10pf r h r l r total c w 25pf ac conditions of test input pulse levels 0v to 3v input rise and fall times 10ns input reference levels 1.5v ac electrical s pecifications (over recommended operating condi tions unless otherwise specifi ed) symbol parameter limits unit min (note 9) typ (note 8) max (note 9) t cl cs to inc setup 100 ns t ld inc high to u/d change 100 ns t di u/d to inc setup 2.9 s t ll inc low period 1 s t lh inc high period 1 s
x9315 fn8179 rev.2.00 page 8 of 16 december 21, 2009 ac timing note: 11. mi in the a.c. timing diagram refers to the minimum incremen tal change in the v w output due to a change in the wiper position. t lc inc inactive to cs inactive 1 s t cph cs deselect time (no store) 100 ns t cph cs deselect time (store) 10 ms t iw inc to vw change 1 5 s t cyc inc cycle time 4 s t r , t f (note 10) inc input rise and fall time 500 s t pu (note 10) power-up to wiper stable 5s t r v cc (note 10) v cc power-up rate 0.2 50 v/ms t wr store cycle 510ms note: 10. this parameter is not 100% tested. ac electrical s pecifications (over recommended operating condi tions unless otherwise specifi ed) (continued) symbol parameter limits unit min (note 9) typ (note 8) max (note 9) cs inc u/d v w t ci t il t ih t cyc t id di t iw mi (note 9) t ic t cph t f t r 10% 90% 90% (store)
x9315 fn8179 rev.2.00 page 9 of 16 december 21, 2009 symbol table performance characteristics (typical) typical noise waveform inputs outputs must be steady will be steady may change from low to high will change from low to high may change from high to low will change from high to low don?t care: changes allowed changing: state not known n/a center line is high impedance 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 0 102030405060708090100 frequency (khz) noise (db) 110 120 130 140 150 160 170 180 190 200
x9315 fn8179 rev.2.00 page 10 of 16 december 21, 2009 typical rtotal vs. temperature typical total resistance temperature coefficient typical wiper resistance 10000 9800 9600 9400 9200 9000 8800 8600 8400 8200 8000 rtotal -55 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 temperature 85 95 105 115 125 c -55 -350 -300 -250 -200 -150 -100 -50 0 -45 -35 -25 -15 -5 5 15 25 35 temperature ppm 45 55 65 75 85 95 105 115 125 c 0 0 100 200 300 400 rw ( ?? 500 600 700 800 2 4 6 8 10 12 14 16 tap 18 20 22 24 26 28 30 32 v cc = 2.7v
x9315 fn8179 rev.2.00 page 11 of 16 december 21, 2009 typical absolute% error per tap position typical relative% error per tap position applications information electronic digitally controlled (xdcp) potentiometers provide three powerful applicat ion advantages; (1) the variability and reliability of a solid-state pot entiometer, (2) the flexibility of computer-based digital controls, and (3) the retentivity of nonvolatile memory used for the storage of multiple potentiometer settings or data. 40.0% 30.0% 20.0% 10.0% 0.0% -10.0% -20.0% -30.0% -40.0% 0 3 6 9 12 15 tap absolute% error 18 21 24 27 30 20.0% 15.0% 10.0% 5.0% 0.0% -5.0% -10.0% -15.0% -20.0% 03691215 relative% error 18 21 24 27 30 tap
x9315 fn8179 rev.2.00 page 12 of 16 december 21, 2009 basic configurations of electronic potentiometers basic circuits v r v w /r w v r i three terminal potentiometer; variable voltage divider two terminal variable resistor; variable current v h v l cascading techniques buffered reference voltage ? + +5v r 1 +v -5v v w v ref v out op-07 r w /v w r w /v w +v +v +v x (a) (b) v out = v w /r w noninverting amplifier + ? v s v o r 2 r 1 v o = (1 + r 2 /r 1 )v s lm308a voltage regulator r 1 r 2 i adj v o (reg) = 1.25v (1 + r 2 /r 1 ) + i adj r 2 v o (reg) v in 317 comparator with hysteresis v ul = {r 1 /(r 1 + r 2 )} v o (max) v ll = {r 1 /(r 1 + r 2 )} v o (min) + ? v s v o r 2 r 1 } } lt311a +5v -5v (for additional circuits see an115)
x9315 fn8179 rev.2.00 page 13 of 16 december 21, 2009 mini small outline pl astic packages (msop) notes: 1. these package dimensions are wi thin allowable dimensions of jedec mo-187ba. 2. dimensioning and tolerancing per ansi y14.5m - 1994. 3. dimension ?d? does not include mold flash, protrusions or gate burrs and are measured at datum plane. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension ?e1? does not includ e interlead flash or protrusions and are measured at datum plane. interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. formed leads shall be planar wi th respect to one another within 0.10mm (0.004) at seating plane. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. dimension ?b? does not include dambar protrusion. allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of ?b? dimension at maximum ma terial condition. minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch). 10. datums and to be determined at datum plane . 11. controlling dimension: millimeter. converted inch dimen- sions are for reference only. l 0.25 (0.010) l1 r1 r 4x ? 4x ? gauge plane seating plane e e1 n 12 top view index area -c- -b- 0.20 (0.008) a b c seating plane 0.20 (0.008) c 0.10 (0.004) c -a- -h- side view b e d a a1 a2 -b- end view 0.20 (0.008) c d e 1 c l c a m8.118 (jedec mo-187aa) 8 lead mini small outline plastic package symbol inches millimeters notes min max min max a 0.037 0.043 0.94 1.10 - a1 0.002 0.006 0.05 0.15 - a2 0.030 0.037 0.75 0.95 - b 0.010 0.014 0.25 0.36 9 c 0.004 0.008 0.09 0.20 - d 0.116 0.120 2.95 3.05 3 e1 0.116 0.120 2.95 3.05 4 e 0.026 bsc 0.65 bsc - e 0.187 0.199 4.75 5.05 - l 0.016 0.028 0.40 0.70 6 l1 0.037 ref 0.95 ref - n8 87 r 0.003 - 0.07 - - r1 0.003 - 0.07 - - 05 o 15 o 5 o 15 o - ? 0 o 6 o 0 o 6 o - rev. 2 01/03
x9315 fn8179 rev.2.00 page 14 of 16 december 21, 2009 package outline drawing m8.15e 8 lead narrow body small outline plastic package rev 0, 08/09 unless otherwise s pecified, tolerance : decimal 0.05 the pin #1 identifier may be either a mold or mark feature. interlead flash or protrusions shall not exceed 0.25mm per side . dimension does not include interlead flash or protrusions. dimensions in ( ) for reference only. dimensioning and tolerancing conform to amse y14.5m-1994. 3. 5. 4. 2. dimensions are in millimeters. 1. notes: detail "a" side view a typical recomme nded land pattern top view a b 4 4 0.25 a mc b c 0.10 c 5 id mark pin no.1 (0.35) x 45 seating plane gauge plane 0.25 (5.40) (1.50) 4.90 0.10 3.90 0.10 1.27 0.43 0.076 0.63 0.23 4 4 detail "a" 0.22 0.03 0.175 0.075 1.45 0.1 1.75 max (1.27) (0.60) 6.0 0.20 reference to jedec ms-012. 6. side view b
x9315 fn8179 rev.2.00 page 15 of 16 december 21, 2009 plastic dual-in-line packages (pdip) mdp0031 plastic dual-in-line package symbol pdip8 pdip14 pdip16 pdip18 pdip20 tolerance notes a 0.210 0.210 0.210 0.210 0.210 max a1 0.015 0.015 0.015 0.015 0.015 min a2 0.130 0.130 0.130 0.130 0.130 0.005 b 0.018 0.018 0.018 0.018 0.018 0.002 b2 0.060 0.060 0.060 0.060 0.060 +0.010/-0.015 c 0.010 0.010 0.010 0.010 0.010 +0.004/-0.002 d 0.375 0.750 0.750 0.890 1.020 0.010 1 e 0.310 0.310 0.310 0.310 0.310 +0.015/-0.010 e1 0.250 0.250 0.250 0.250 0.250 0.005 2 e 0.100 0.100 0.100 0.100 0.100 basic ea 0.300 0.300 0.300 0.300 0.300 basic eb 0.345 0.345 0.345 0.345 0.345 0.025 l 0.125 0.125 0.125 0.125 0.125 0.010 n 8 14 16 18 20 reference rev. b 2/99 notes: 1. plastic or metal protrusions of 0.010? maximum per side are not included. 2. plastic interlead protrusions of 0.010? maximum per side are not included. 3. dimensions e and ea are measured with the leads constrained perpendicular to the seating plane. 4. dimension eb is measured wi th the lead tips unconstrained. 5. 8 and 16 lead packages have half end-leads as shown. d l a e b a1 note 5 a2 seating plane l n pin #1 index e1 12 n/2 b2 e eb ea c
fn8179 rev.2.00 page 16 of 16 december 21, 2009 x9315 intersil products are manufactured, assembled and tested utilizing iso9001 quality systems as noted in the quality certifications found at www.intersil.com/en/suppor t/qualandreliability.html intersil products are sold by description on ly. intersil may modify the circuit design an d/or specifications of products at any time without notice, provided that such modification does not, in intersil's sole judgment, affect the form, fit or function of the product. accordingly, the reader is cautioned to verify that datasheets are current before placing orders. information fu rnished by intersil is believed to be accu rate and reliable. however, no responsib ility is assumed by intersil or its subsidiaries for its use; nor for any infrin gements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiaries. for information regarding intersil corporation and its products, see www.intersil.com for additional products, see www.intersil.com/en/products.html ? copyright intersil americas ll c 2005-2009. all rights reserved. all trademarks and registered trademarks are the property of their respective owners. small outline plast ic packages (soic) index area e d n 123 -b- 0.25(0.010) c a m bs e -a- l b m -c- a1 a seating plane 0.10(0.004) h x 45 c h 0.25(0.010) b m m ? notes: 1. symbols are defined in the mo series symbol list in section 2.2 of publication number 95. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension d does not include mold flash, protrusions or gat e burrs. mold flash, protrusion and gate burrs shall not exceed 0.15mm ( 0.006 inch) per side. 4. dimension e does not include interlead flash or protrusions . inter- lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 6. l is the length of terminal for soldering to a substrate. 7. n is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. the lead width b, as measured 0.36mm (0.014 inch) or greate r above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. controlling dimension: millime ter. converted inch dimensions are not necessarily exact. m8.15 (jedec ms-012-aa issue c) 8 lead narrow body small outline plastic package symbol inches millimeters notes min max min max a 0.0532 0.0688 1.35 1.75 - a1 0.0040 0.0098 0.10 0.25 - b 0.013 0.020 0.33 0.51 9 c 0.0075 0.0098 0.19 0.25 - d 0.1890 0.1968 4.80 5.00 3 e 0.1497 0.1574 3.80 4.00 4 e 0.050 bsc 1.27 bsc - h 0.2284 0.2440 5.80 6.20 - h 0.0099 0.0196 0.25 0.50 5 l 0.016 0.050 0.40 1.27 6 n8 87 ? 0 8 0 8 - rev. 1 6/05

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